1. Field of the Invention
The present invention relates to a display device, and more particularly to an active-matrix-type display device which uses a-Si-type thin film transistors in a display region and forms a drive circuit which uses a poly-Si-type thin film transistor in a periphery of the display region.
2. Description of the Related Art
In a liquid crystal display device, on a TFT substrate on which pixel electrodes, thin film transistors (TFT) and the like are formed in a matrix array, a color filter substrate which forms color filters and the like thereon at positions corresponding to the pixel electrodes is arranged to face the TFT substrate in an opposed manner, and liquid crystal is sandwiched between the TFT substrate and the color filter substrate. An image is formed by controlling optical transmissivity of light passing through liquid crystal molecules for every pixel.
Data lines which extend in the longitudinal direction and are arranged parallel to each other in the lateral direction, and scanning lines which extend in the lateral direction and are arranged parallel to each other in the longitudinal direction are formed on the TFT substrate, and a pixel is formed in each region surrounded by the data lines and the scanning lines. The pixel is mainly constituted of a pixel electrode and a thin film transistor (TFT) which constitutes a switching element. A display region is formed of a large number of pixels formed in a matrix array in this manner.
Outside the display region, a scanning line drive circuit which drives the scanning lines and a data line drive circuit which drives the data lines are arranged. Conventionally, in the scanning line drive circuit and the data line drive circuit, an IC chip driver is mounted externally. The IC chip driver may be connected to the TFT substrate by a tape carrier method or the like or the IC driver may be directly mounted on the TFT substrate by a chip-on mounting method.
On the other hand, to satisfy a demand for the miniaturization of the whole display device while ensuring a display area or the like, a technique which forms a drive circuit using a TFT in a periphery of the display region has been developed. In such a display device, a TFT formed in a display region forms a channel portion using a-Si and a TFT formed in a drive circuit part forms a channel portion using poly-Si. That is, a-Si which exhibits a small leak current is used in the display region, and poly-Si which exhibits large electron mobility is used in the drive circuit part.
In general, the bottom gate structure is adopted in the TFT which uses a-Si, and the top gate structure is adopted in the TFT which uses poly-Si. Accordingly, it is necessary to form TFTs which have the different structures on one sheet of substrate and hence, the manufacturing process becomes complicated.
JP-A-5-55570 (patent document 1) discloses the constitution in which, for preventing the process from becoming complicated, a TFT which uses poly-Si also adopts the bottom gate structure. In such constitution, a poly-Si layer which becomes a channel is firstly formed on a gate insulation film formed on a gate electrode, and an a-Si layer is formed on the poly-Si layer. A contact layer formed of an n+ layer is formed on the a-Si layer, and source/drain electrodes (SD electrodes) are formed on the contact layer. By forming the TFT which forms the channel using poly-Si in such a manner, the number of steps which can be shared in common between the TFT which forms the channel using a-Si and the TFT which forms the channel using poly-Si is increased and hence, the manufacturing process can be simplified.
FIG. 9 shows the constitution of a TFT having a channel made of poly-Si in the same manner as the TFT described in patent document 1. In the technique disclosed in patent document 1, the poly-Si layer is formed on a gate insulation layer formed on a gate electrode 103, an a-Si layer is formed on the poly-Si layer, and an n+ layer is formed on the a-Si layer thus forming the contact layer. In such constitution, when the transistor is turned on, an ON current surely flows through the poly-Si layer which exhibits high mobility. However, when the transistor is turned off, there arises a drawback that an electric current leaks.
FIG. 9A is a plan view of the TFT, and FIG. 9B is a cross-sectional view taken along a line A-A in FIG. 9A. In FIG. 9A, a poly-Si layer 107 is formed on the gate electrode 103 with a gate insulation film 104 sandwiched therebetween, and an a-Si layer 108 is formed on the poly-Si layer 107. The SD electrode 113 is formed on the a-Si layer 108 by way of an n+Si layer 109.
FIG. 9B is the detailed cross-sectional view of the TFT shown in FIG. 9A. In FIG. 9B, the gate electrode 103 is formed on a background film 102, and the gate insulation film 104 is formed so as to cover the gate electrode 103. The poly-Si layer 107 is formed on the gate insulation film 104, and the a-Si layer 108 is formed on the poly-Si layer 107. The n+Si layer 109 is formed on the a-Si layer 108. Since the a-Si layer 108 and the n+Si layer 109 are formed by photolithography using the same mask, these layers have the same planar shape. The SD electrode 113 is formed on the n+Si layer 109. The SD electrode 113 is formed of a barrier metal layer 110 made of Mo, an Al layer 111, and a cap metal layer 112 made of Mo.
In the constitution shown in FIG. 9, there arises no drawback when an ON current is supplied to the TFT by applying a positive voltage to the gate electrode 103. However, when the TFT is turned off by applying a zero voltage or a negative voltage to the gate electrode 103, there arises a drawback. FIG. 10 shows the relationship between a gate voltage and a drain current of the TFT. The characteristic of the TFT is required to be set such that the drain current flows in the TFT when the positive voltage is applied to the gate electrode 103, and the drain current is cut off, that is, the drain current does not flow when the zero voltage or the negative voltage is applied to the gate electrode 103. A dotted line shown in FIG. 10 indicates the relationship between the gate voltage and the drain current of the generally-available TFT which uses a-Si. When the gate voltage reaches a certain value, the drain current is saturated and only a trivial leak current flows when the gate potential becomes zero or minus.
On the other hand, in the stacked structure formed of the poly-Si film and the a-Si film shown in FIG. 9A and FIG. 9B, there is observed a phenomenon that even when the gate electrode 103 is set at the zero potential or at the minus potential, the drain current is not cut. This implies that the TFT cannot play a role of a switching element. This phenomenon is considered to occur due to the following cause.
FIG. 11 is a cross-sectional view similar to the cross-sectional view shown in FIG. 9B. In FIG. 11, when the negative voltage is applied to the gate electrode 103, holes are induced in the poly-Si layer 107. No potential barrier exists between the poly-Si layer 107 and the barrier metal layer 110 of the SD electrode 113. Accordingly, the electric current generated by the holes directly flows into the SD electrode 113. Accordingly, the TFT is not turned off.